The invention relates in general to integrated circuits with thin film resistors.
Thin-film resistors are generally considered to be more precise than resistors made by diffusion or by deposited polysilicon. This is due to the superior (lower) temperature coefficient of resistivity, and voltage coefficient of thin-film resistors, when compared to diffused resistors and polysilicon resistors. Also, thin-film resistors are formed much later in the process flow (usually just prior to the interconnect metallization deposition), than diffused resistors and polysilicon resistors. The effects of subsequent process steps on the properties of a thin-film resistor are thus minimized. In a typical thin film process, a dielectric layer is deposited over the semiconductor substrate, thin film resistor material is uniformly deposited on the dielectric layer, and the thin film resistor material is patterned into a geometric configuration that yields the desired resistance value. Thin film resistors are trimmed precisely by a laser trimmer to within a very small deviation from the desired resistance value.
Thin film, trimmable resistors may be used in high/low power analog and low power digital integrated circuits. In the past, integrated circuits have generally restricted the devices in any given circuit to either high/low power analog or low power digital applications. However, modern circuits integrate both analog and digital applications on a single chip. See, for example, U.S. Pat. No. 5,369,309, the entire disclosure of which is here and incorporated by reference. That patent describes an analog to digital converter and describes the simultaneous fabrication of high power and low power devices in a substrate. Precision thin film resistors are used to manufacture analog to digital converters, band-gap reference circuits, and subscriber line interface circuits (SLIC) for telephone systems.
Until recently, telephone line cards have been typically housed at locations where large power generators were readily available (i.e. central offices). Thus, the amount of power required for operating the SLICs contained in the line cards was relatively unimportant.
Optical fibers have very wide bandwidth and are capable of handling a large number of signals. A large number of telephone conversations and/or blocks of data transmission can be concentrated into a much smaller number of telephone cables made with optical fibers.
Unfortunately, optical fibers are unable to carry the D.C. power required to operate the telephone sets. It is impractical to supply power at the subscriber site. Such subscriber telephones would be incompatible with existing phone sets, and would depend on the power companies. In the event of a loss of utility power, a subscriber""s phone would not work. The problem is solved by providing remote sites with relatively small power capabilities at several locations within the neighborhoods to compensate for the optical fiber D.C. power deficiency. With this new arrangement, signals from the central offices are transmitted to the appropriate remote sites where the line cards (and hence the SLICs) now reside. The SLICs then provide the signals and the power to the subscriber phones (and extensions) at the subscriber sites.
Since these remote sites have limited power generating capabilities, the power consumed by the SLICs has become a critical factor. Thus, new SLIC designs are expected to provide the high power required to make telephone sets operate properly, while minimizing the power consumption necessary to operate the SLIC itself. Furthermore, the relief in performance requirements that would logically follow from a closer proximity to the subscriber, have not materialized because expanded duties have been imposed on the SLIC function.
Low power applications require a material with high sheet resistance such as silicon chromium (sichrome, or SiCr). That material has a sheet resistance on the order of 2.0 kOhm per square. For high power applications, the material of choice could be nickel chromium (nichrome, or NiCr) which has a sheet resistance of about 200 Ohms per square. There is an order of magnitude of difference between the sheet resistance of sichrome and the sheet resistance of nichrome. If one uses higher power nichrome resistors for low power applications, there would be an insufficient amount of substrate area to form the low power resistors, which typically range between 10 kohms to 500 kOhms. This is especially critical in low-power applications and in circuits that require a critical ratio match for both low value resistor sets and high value resistor sets. In the latter case, a diffused or implanted resistor is typically used for the low value portion of the combination. A diffused resistor is made by connecting a metal interconnect (such as aluminum) to a silicon diffusion or implant through contact apertures cut through a field oxide (typically SiO2) at the ends of the diffusion or implant. The silicon diffusion or implant serves as the resistor material.
As such, there remains a long felt and unfilled need to provide resistor sets in which high value resistors are precisely matched and low value precise resistors are also precisely matched. There is also a need for sets of high and low power resistors with very low temperature coefficients as well as low voltage coefficients over the operating range of the device. There is also a need for precision resistors with significantly different sheet resistance values that are formed on the same die or wafer. There is a further need for thin film resistors of different materials formed on the same dielectric layer or formed on different dielectric layers.
The foregoing needs are met by the invention. The invention provides a method for forming first and second thin film resistors of different first and second resistor materials on a first dielectric layer or on first and second dielectric layers. The invention forms the first and second thin film resistors by direct etching or lift off or by a combination of direct etching and lift off.
The invention provides a method for forming first and second thin film resistors of respective first and second different materials on first and second dielectric layers. The first and second dielectric layers are separated by a metal interconnect layer, preferably aluminum. The first resistor is formed on the first dielectric layer by either direct etching or by lift off. The first dielectric layer is suitably patterned to provide apertures for the metal interconnect to contact the underlying integrated circuit that has been formed in the substrate. The metal interconnect layer is sputter deposited over the first dielectric layer and over the first thin film resistor. The apertures in the dielectric layer provide alignment targets for patterning the resulting metal interconnect layer in order to expose the first thin film resistors which may be suitably trimmed to their desired resistance. A second dielectric layer is uniformly deposited over the surface and a layer of second thin film resistor material is deposited over the second dielectric layer. The second resistor material is different from the first resistor material that forms the first thin film resistors. The second resistor material is suitably patterned to provide the second thin film resistors. The second dielectric layer is likewise patterned and vias are opened to at least the underlying first interconnect layer. A second interconnect layer is deposited over the second dielectric layer and the second thin film resistors. The second interconnect layer is likewise patterned to expose the second thin film resistors. The second thin film resistor and the second interconnect layer are coated with a passivation layer, preferably silicon nitride.
The invention provides a method for forming first and second thin film resistors of respective first and second different materials on only a first dielectric layer. The first thin film resistor is formed on the first dielectric layer by either a lift off method or a direct etching method. The second thin film resistor is formed on the same first dielectric layer by either a lift off or a direct etching method. With the direct etching method, a layer of a second thin film resistor material is uniformly deposited over the first dielectric layer and over the first thin film resistor. Photoresist is deposited and patterned over the bulk of the second resistor material. The exposed portion of the second resistor material is subjected to a suitable etching agent that is selective between the first and second resistor materials and removes the second resistor material but does not remove the first resistor material or removes the first resistor material at a substantially lower rate than it removes the second resistor material. The resulting first and second thin film resistors on the first dielectric layer are coated with a first level interconnect layer of metal, preferably, aluminum. The first level interconnect layer is patterned to expose the first and second thin film resistors. The thin film resistors may be trimmed. A second dielectric layer is uniformly deposited over the first interconnect layer and the first and second thin film resistors. The second dielectric layer is patterned with vias extending at least to the first interconnect layer. The second level interconnect layer, (which is optional), preferably of aluminum, is uniformly deposited over the second dielectric layer. A passivation layer, typically silicon nitride, is deposited over the second level interconnect layer.